Novel GaN Vertical Power Devices & UWBG Integration

The challenge

Vertical current flow for cost-effective high-voltage GaN

For GaN-on-Si power devices, a fully-vertical structure — where current flows vertically through electrodes on opposite sides of the wafer — is preferable to avoid current crowding and achieve low on-state resistance. Vertical architectures also unlock the large-scale availability and mature fabrication technology of silicon substrates, enabling cost-effective mass commercialization of vertical GaN devices.

However, achieving high-quality vertical GaN on silicon demands innovations across epitaxial growth, doping, device fabrication, and substrate processing.

Vertical GaN power device on silicon wafer

Key innovations

From quasi-vertical to fully-vertical & beyond

5 breakthroughs

Vertical GaN on silicon

First fully-vertical GaN MOSFETs on 6″ Si

Our group demonstrated significant progress on vertical GaN power devices on cost-effective large-scale silicon substrates. The optimization of growth, doping, and device fabrication led to a remarkable electron mobility of 720 cm²/V·s for a 4-μm-thick GaN drift layer, resulting in vertical GaN PiN diodes on 6″ Si with a high breakdown voltage of 820 V and a state-of-the-art Baliga figure of merit of 2.0 GW/cm² — 6× the highest value reported for GaN-on-Si vertical diodes at the time. This work was followed by the demonstration of quasi-vertical GaN power MOSFETs on 6″ silicon substrates, and later the first fully-vertical GaN power MOSFETs on a 6-inch Si substrate. A robust fabrication method based on selective removal of the Si substrate and conformal copper electroplating enabled excellent mechanical stability and electrical contact to the drain terminal.

Khadar et al., IEEE EDL 2018 Liu et al., IEEE EDL 2018 Khadar et al., IEEE EDL 2019

Fully vertical MOSFET on 6-inch Si substrates

p-Oxides for GaN

p-NiO/LiNiO as a replacement for p-GaN

Localized p-GaN regions are critical for advanced vertical power devices, yet forming them remains challenging — ion implantation requires extreme conditions and epitaxial regrowth suffers from non-uniform Mg doping. We introduced a p-NiO/LiNiO double-layered oxide stack grown via low-temperature deposition as a high-quality alternative. The stack combines a high hole concentration p-NiO film (2×10¹⁹ cm⁻³) with an epitaxial crystalline p-LiNiO film, producing a p-n junction with excellent electrical performance: V_ON of 1.7 V, R_ON,sp of 1.5 mΩ·cm², and breakdown voltage exceeding 1 kV — comparable to epitaxial GaN homojunctions. We further demonstrated p-NiO junction termination extensions for GaN power devices as early as 2021, pioneering the use of p-type oxides to replace p-GaN in high-performance devices.

Hao et al., IEEE EDL 2025 Hao et al., IEEE EDL 2026 Khadar et al., APEX 2021

p-NiO/LiNiO heterojunction as alternative to p-GaN

Polarization engineering

Polarization-enhanced GaN Schottky barrier diodes with p-InGaN

Vertical GaN Schottky barrier diodes (SBDs) suffer from high electric fields at the Schottky interface under reverse bias, causing excessive leakage and premature breakdown. We introduced a few-nm-thick pseudomorphically fully-depleted p-InGaN layer between the Schottky metal and the GaN drift region. The strong piezoelectric polarization field in InGaN counteracts the external electric field at reverse bias, drastically reducing leakage current without any degradation in R_ON,sp. The fabricated polarization-enhanced SBDs achieved a breakdown voltage of 800 V with a remarkably low R_ON,sp of 0.48 mΩ·cm², yielding a Baliga FOM of 1.32 GW/cm² — among the highest reported for GaN SBDs. Combined with p-NiO/LiNiO junction termination extensions, the latest devices reach 1,055 V with R_ON,sp of 0.61 mΩ·cm² and a BFOM of 1.82 GW/cm².

Floriduz & Hao et al., IEEE EDL 2024 Hao et al., IEEE EDL 2026

Polarization-enhanced GaN Schottky barrier diode with p-InGaN

Buffer-less growth

Buffer-less epitaxy of GaN on foreign substrates

For fully-vertical GaN-on-Si devices, the silicon substrate does not need to be removed and can instead become a functional part of the device — but only if the resistive AlN buffer layer is eliminated. Our group demonstrated a direct high-temperature growth of GaN on foreign substrates (sapphire, ScAlMgO₄, and silicon) by employing a simple TMA preflow, without inserting an intentional resistive AlN buffer. The resulting buffer-less n-type GaN on n-type Si showed surface morphology and crystalline quality superior to conventional GaN-on-Si with typical AlN buffer layers, and a several-orders-of-magnitude enhancement in vertical current conduction. On ScAlMgO₄ substrates, we achieved single-crystalline GaN films via thermally-dewetted thin Al films, opening new routes for lattice-matched vertical GaN devices. This method provides an effective and practical path toward high-efficiency fully-vertical GaN-on-Si devices where the silicon substrate remains part of the device structure.

Floriduz, Choi & Matioli, JJAP 2024 Floriduz & Matioli, JJAP 2022

Buffer-less GaN epitaxy on foreign substrates

Diamond–GaN integration

Diamond on GaN for complementary devices and thermal management

The lack of p-channel devices in GaN technology is a major obstacle for complementary operations. We demonstrated high-performance polycrystalline diamond p-channel transistors on GaN-on-Si by depositing and hydrogenating diamond to form a 2D hole-gas (2DHG) acting as the p-channel. The devices exhibited an on/off ratio of 10⁹, breakdown voltage of 400 V, R_ON,sp of 84 mΩ·cm², and thermal conductivities exceeding 900 W/m·K. To address the challenging growth of diamond on GaN (high lattice and thermal expansion mismatches), we developed a novel seed dibbling method that produces diamond films with 95% sp³/sp² ratio, significantly larger grains, excellent interface quality, and residual stresses as low as 0.2 GPa — enabling a 2-fold improvement in effective thermal conductivity with only a 20-μm diamond layer. This opens new possibilities for complementary power switches, integrated gate drivers, and near-junction heat spreaders on a diamond-on-GaN platform.

Soleimanzadeh et al., IEEE EDL 2020 Soleimanzadeh et al., ACS AMI 2021

Impact & Vision

Towards UWBG heterojunction devices

Ultra-wide-bandgap semiconductors — (Al)GaN, Ga₂O₃, and diamond — offer inherent advantages for high-efficiency power devices, but no single material provides all the properties needed. Our vision is the hetero-epitaxial integration of these UWBG materials in a single device, combining diamond’s excellent p-type conductivity and thermal performance, Ga₂O₃’s low-cost n-type conductivity, and (Al)GaN’s mature n- and p-type doping capabilities. By pursuing buffer-less direct epitaxy, p-type oxide alternatives, and diamond-on-GaN integration, our group is building a comprehensive platform for next-generation power semiconductor devices with significantly improved breakdown voltages, electrical efficiency, and thermal performance beyond the current state of the art.

Selected references

Key publications

2026

Z. Hao, A. Floriduz, Y. Zong and E. Matioli, “Polarization Enhanced GaN SBDs With p-NiO/LiNiO Junction Termination Extensions Achieving 1 kV Breakdown Voltage,” IEEE Electron Device Letters, vol. 47, no. 4, pp. 704–707, 2026.

2025

Z. Hao, A. Floriduz, Y. Zong, U. Choi, M. Mensi and E. Matioli, “p-NiO/LiNiO-GaN Heterojunctions: A Potential Alternative to p-GaN for Advanced Devices,” IEEE Electron Device Letters, vol. 46, no. 5, pp. 729–732, 2025.

2024

A. Floriduz, Z. Hao and E. Matioli, “Polarization-Enhanced GaN Schottky Barrier Diodes: Ultra-Thin InGaN for High Breakdown Voltage and Low R_on,” IEEE Electron Device Letters, vol. 45, no. 7, pp. 1121–1124, 2024.

2024

A. Floriduz, U. Choi, and E. Matioli, “Direct high-temperature growth of GaN on Si using trimethylaluminum preflow enabling vertically-conducting heterostructures,” Jpn. J. Appl. Phys., vol. 63, no. 6, p. 060904, 2024.

2022

A. Floriduz and E. Matioli, “GaN growth on ScAlMgO₄ substrates via thermally-dewetted thin Al films,” Jpn. J. Appl. Phys., vol. 61, p. 118003, 2022.

2021

R. Soleimanzadeh, M. Naamoun, A. Floriduz, R. A. Khadar, R. van Erp and E. Matioli, “Seed Dibbling Method for the Growth of High-Quality Diamond on GaN,” ACS Applied Materials & Interfaces, vol. 13, no. 36, pp. 43516–43523, 2021.

2021

R. A. Khadar, A. Floriduz, T. Wang and E. Matioli, “p-NiO junction termination extensions for GaN power devices,” Appl. Phys. Express, vol. 14, 071006, 2021.

2020

R. Soleimanzadeh, M. Naamoun, R. A. Khadar, R. van Erp and E. Matioli, “H-Terminated Polycrystalline Diamond p-Channel Transistors on GaN-on-Silicon,” IEEE Electron Device Letters, vol. 41, no. 1, pp. 119–122, 2020.

2019

R. A. Khadar, …, E. Matioli, “Fully-vertical GaN-on-Si power MOSFETs,” IEEE Electron Device Letters, 2019.

2018

R. A. Khadar, …, E. Matioli, “820 V GaN-on-Si Quasi-Vertical P-i-N Diodes with BFOM of 2.0 GW/cm²,” IEEE Electron Device Letters, 2018. (IEEE EDL Editor’s Pick)